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perf: Improve planning time w/ global default ConfigOptions#21093

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alamb wants to merge 9 commits intoapache:mainfrom
alamb:alamb/default_arc
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perf: Improve planning time w/ global default ConfigOptions#21093
alamb wants to merge 9 commits intoapache:mainfrom
alamb:alamb/default_arc

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@alamb alamb commented Mar 21, 2026

Which issue does this PR close?

Rationale for this change

While reviewing #21092 I realized that we could potentially keep the existing APIs but stop copying the default object if we used a global default singleton

What changes are included in this PR?

  • First commit -- add the singleton
  • Second commit -- update all callsites (thanks codex!)

Are these changes tested?

Functioanlly they are tested by CI

I will also run planning benchmarks

Are there any user-facing changes?

@alamb alamb changed the title Alamb/default arc PlanningPerf: Add global default ConfigOptions Mar 21, 2026
@github-actions github-actions bot added logical-expr Logical plan and expressions physical-expr Changes to the physical-expr crates optimizer Optimizer rules core Core DataFusion crate common Related to common crate execution Related to the execution crate proto Related to proto crate functions Changes to functions implementation physical-plan Changes to the physical-plan crate spark labels Mar 21, 2026
@alamb alamb marked this pull request as draft March 21, 2026 18:55
@alamb alamb marked this pull request as ready for review March 21, 2026 20:52
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alamb commented Mar 21, 2026

I am running some benchmarks on this branch as well -- results will be posted in a few hours

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alamb commented Mar 22, 2026

Similarly to #21092

I think a substantial amount of the reported improvement on this PR was the same underlying mechanism as #21084

Now that that is merged I'll rerun the benchmarks and see if there is any residual improvement left

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alamb commented Mar 22, 2026

@AdamGS I wonder what you think of this PR compared to the builder you propose in

I think they both accomplish the same basic thing, but this one doesn't require any downstream code changes to get the benefit

@alamb alamb changed the title PlanningPerf: Add global default ConfigOptions perf: Improve planning time w/ global default ConfigOptions Mar 22, 2026
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AdamGS commented Mar 23, 2026

@alamb My only concern with this is that it might be misused somewhere by someone ignoring a provided config from the session, but that's mostly a hypothetical and this is nicer for tests and has basically no API churn.

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alamb commented Mar 23, 2026

@alamb My only concern with this is that it might be misused somewhere by someone ignoring a provided config from the session, but that's mostly a hypothetical and this is nicer for tests and has basically no API churn.

I also think we could do both this one and #21092 🤔

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alamb commented Mar 23, 2026

One potential option is to backport this one to 53 and 52 (as it has no churn), and leave this PR on main

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AdamGS commented Mar 23, 2026

Seems like any non-empty permutation here is an improvement, they all look good to me

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@github-actions github-actions bot added sql SQL Planner substrait Changes to the substrait crate datasource Changes to the datasource crate labels Apr 2, 2026
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alamb commented Apr 3, 2026

run benchmark sql_planner

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🤖 Criterion benchmark running (GKE) | trigger
Instance: c4a-highmem-16 (12 vCPU / 65 GiB) | Linux bench-c4185177772-766-lpsrf 6.12.55+ #1 SMP Sun Feb 1 08:59:41 UTC 2026 aarch64 GNU/Linux

CPU Details (lscpu)
Architecture:                            aarch64
CPU op-mode(s):                          64-bit
Byte Order:                              Little Endian
CPU(s):                                  16
On-line CPU(s) list:                     0-15
Vendor ID:                               ARM
Model name:                              Neoverse-V2
Model:                                   1
Thread(s) per core:                      1
Core(s) per cluster:                     16
Socket(s):                               -
Cluster(s):                              1
Stepping:                                r0p1
BogoMIPS:                                2000.00
Flags:                                   fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 sve asimdfhm dit uscat ilrcpc flagm sb paca pacg dcpodp sve2 sveaes svepmull svebitperm svesha3 svesm4 flagm2 frint svei8mm svebf16 i8mm bf16 dgh rng bti
L1d cache:                               1 MiB (16 instances)
L1i cache:                               1 MiB (16 instances)
L2 cache:                                32 MiB (16 instances)
L3 cache:                                80 MiB (1 instance)
NUMA node(s):                            1
NUMA node0 CPU(s):                       0-15
Vulnerability Gather data sampling:      Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit:             Not affected
Vulnerability L1tf:                      Not affected
Vulnerability Mds:                       Not affected
Vulnerability Meltdown:                  Not affected
Vulnerability Mmio stale data:           Not affected
Vulnerability Reg file data sampling:    Not affected
Vulnerability Retbleed:                  Not affected
Vulnerability Spec rstack overflow:      Not affected
Vulnerability Spec store bypass:         Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1:                Mitigation; __user pointer sanitization
Vulnerability Spectre v2:                Mitigation; CSV2, BHB
Vulnerability Srbds:                     Not affected
Vulnerability Tsa:                       Not affected
Vulnerability Tsx async abort:           Not affected
Vulnerability Vmscape:                   Not affected

Comparing alamb/default_arc (37cc3b9) to 777ecb8 (merge-base) diff
BENCH_NAME=sql_planner
BENCH_COMMAND=cargo bench --features=parquet --bench sql_planner
BENCH_FILTER=
Results will be posted here when complete


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🤖 Criterion benchmark completed (GKE) | trigger

Instance: c4a-highmem-16 (12 vCPU / 65 GiB)

CPU Details (lscpu)
Architecture:                            aarch64
CPU op-mode(s):                          64-bit
Byte Order:                              Little Endian
CPU(s):                                  16
On-line CPU(s) list:                     0-15
Vendor ID:                               ARM
Model name:                              Neoverse-V2
Model:                                   1
Thread(s) per core:                      1
Core(s) per cluster:                     16
Socket(s):                               -
Cluster(s):                              1
Stepping:                                r0p1
BogoMIPS:                                2000.00
Flags:                                   fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 sve asimdfhm dit uscat ilrcpc flagm sb paca pacg dcpodp sve2 sveaes svepmull svebitperm svesha3 svesm4 flagm2 frint svei8mm svebf16 i8mm bf16 dgh rng bti
L1d cache:                               1 MiB (16 instances)
L1i cache:                               1 MiB (16 instances)
L2 cache:                                32 MiB (16 instances)
L3 cache:                                80 MiB (1 instance)
NUMA node(s):                            1
NUMA node0 CPU(s):                       0-15
Vulnerability Gather data sampling:      Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit:             Not affected
Vulnerability L1tf:                      Not affected
Vulnerability Mds:                       Not affected
Vulnerability Meltdown:                  Not affected
Vulnerability Mmio stale data:           Not affected
Vulnerability Reg file data sampling:    Not affected
Vulnerability Retbleed:                  Not affected
Vulnerability Spec rstack overflow:      Not affected
Vulnerability Spec store bypass:         Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1:                Mitigation; __user pointer sanitization
Vulnerability Spectre v2:                Mitigation; CSV2, BHB
Vulnerability Srbds:                     Not affected
Vulnerability Tsa:                       Not affected
Vulnerability Tsx async abort:           Not affected
Vulnerability Vmscape:                   Not affected
Details

group                                                 alamb_default_arc                      main
-----                                                 -----------------                      ----
logical_aggregate_with_join                           1.00    434.4±3.76µs        ? ?/sec    1.01    439.9±1.11µs        ? ?/sec
logical_plan_struct_join_agg_sort                     1.00    161.7±0.53µs        ? ?/sec    1.07    173.1±0.59µs        ? ?/sec
logical_select_all_from_1000                          1.05      8.4±0.06ms        ? ?/sec    1.00      7.9±0.03ms        ? ?/sec
logical_select_one_from_700                           1.00    317.2±1.06µs        ? ?/sec    1.01    320.6±2.07µs        ? ?/sec
logical_trivial_join_high_numbered_columns            1.00    263.0±0.80µs        ? ?/sec    1.01    266.2±0.66µs        ? ?/sec
logical_trivial_join_low_numbered_columns             1.00    250.1±0.69µs        ? ?/sec    1.02    254.5±0.62µs        ? ?/sec
physical_intersection                                 1.00    570.6±1.56µs        ? ?/sec    1.03    586.0±3.69µs        ? ?/sec
physical_join_consider_sort                           1.00   1003.3±6.32µs        ? ?/sec    1.02   1023.6±2.93µs        ? ?/sec
physical_join_distinct                                1.00    245.0±1.41µs        ? ?/sec    1.02    249.2±0.69µs        ? ?/sec
physical_many_self_joins                              1.00      7.5±0.02ms        ? ?/sec    1.02      7.6±0.01ms        ? ?/sec
physical_plan_clickbench_all                          1.00    108.4±0.21ms        ? ?/sec    1.00    108.3±0.22ms        ? ?/sec
physical_plan_clickbench_q1                           1.00   1104.0±4.13µs        ? ?/sec    1.01   1114.8±3.66µs        ? ?/sec
physical_plan_clickbench_q10                          1.02   1770.1±5.00µs        ? ?/sec    1.00   1742.9±4.50µs        ? ?/sec
physical_plan_clickbench_q11                          1.02  1901.1±10.79µs        ? ?/sec    1.00   1860.0±4.43µs        ? ?/sec
physical_plan_clickbench_q12                          1.01   1959.6±7.32µs        ? ?/sec    1.00   1946.7±3.36µs        ? ?/sec
physical_plan_clickbench_q13                          1.01   1716.1±5.00µs        ? ?/sec    1.00   1707.0±4.43µs        ? ?/sec
physical_plan_clickbench_q14                          1.00   1873.9±3.87µs        ? ?/sec    1.00   1866.2±4.80µs        ? ?/sec
physical_plan_clickbench_q15                          1.00   1775.4±5.78µs        ? ?/sec    1.00   1766.7±6.08µs        ? ?/sec
physical_plan_clickbench_q16                          1.00   1473.1±3.08µs        ? ?/sec    1.00   1473.7±5.21µs        ? ?/sec
physical_plan_clickbench_q17                          1.00   1522.2±5.10µs        ? ?/sec    1.00   1519.7±3.84µs        ? ?/sec
physical_plan_clickbench_q18                          1.00   1361.9±5.12µs        ? ?/sec    1.01   1377.4±6.43µs        ? ?/sec
physical_plan_clickbench_q19                          1.00   1738.5±3.69µs        ? ?/sec    1.00   1743.9±5.36µs        ? ?/sec
physical_plan_clickbench_q2                           1.01   1467.2±4.17µs        ? ?/sec    1.00   1453.3±5.47µs        ? ?/sec
physical_plan_clickbench_q20                          1.01   1198.3±5.33µs        ? ?/sec    1.00   1187.7±4.92µs        ? ?/sec
physical_plan_clickbench_q21                          1.00   1460.4±6.73µs        ? ?/sec    1.00   1455.0±4.98µs        ? ?/sec
physical_plan_clickbench_q22                          1.00  1853.2±10.42µs        ? ?/sec    1.00   1851.0±6.49µs        ? ?/sec
physical_plan_clickbench_q23                          1.00      2.0±0.00ms        ? ?/sec    1.01      2.0±0.01ms        ? ?/sec
physical_plan_clickbench_q24                          1.00      3.0±0.01ms        ? ?/sec    1.00      3.0±0.01ms        ? ?/sec
physical_plan_clickbench_q25                          1.00   1552.5±4.03µs        ? ?/sec    1.00   1547.9±3.30µs        ? ?/sec
physical_plan_clickbench_q26                          1.01   1396.3±4.60µs        ? ?/sec    1.00   1387.9±5.00µs        ? ?/sec
physical_plan_clickbench_q27                          1.01   1568.6±3.92µs        ? ?/sec    1.00   1558.1±4.30µs        ? ?/sec
physical_plan_clickbench_q28                          1.00      2.0±0.00ms        ? ?/sec    1.00      2.0±0.00ms        ? ?/sec
physical_plan_clickbench_q29                          1.00      2.2±0.01ms        ? ?/sec    1.00      2.2±0.02ms        ? ?/sec
physical_plan_clickbench_q3                           1.01   1383.8±3.52µs        ? ?/sec    1.00   1374.9±9.64µs        ? ?/sec
physical_plan_clickbench_q30                          1.00     16.3±0.04ms        ? ?/sec    1.00     16.3±0.11ms        ? ?/sec
physical_plan_clickbench_q31                          1.04      2.2±0.01ms        ? ?/sec    1.00      2.1±0.00ms        ? ?/sec
physical_plan_clickbench_q32                          1.01      2.1±0.01ms        ? ?/sec    1.00      2.1±0.00ms        ? ?/sec
physical_plan_clickbench_q33                          1.02  1765.3±12.53µs        ? ?/sec    1.00   1726.2±5.16µs        ? ?/sec
physical_plan_clickbench_q34                          1.01   1510.5±9.92µs        ? ?/sec    1.00   1497.0±4.58µs        ? ?/sec
physical_plan_clickbench_q35                          1.00   1562.9±3.95µs        ? ?/sec    1.01   1575.8±4.97µs        ? ?/sec
physical_plan_clickbench_q36                          1.00   1881.6±4.76µs        ? ?/sec    1.00   1888.2±3.35µs        ? ?/sec
physical_plan_clickbench_q37                          1.01      2.3±0.00ms        ? ?/sec    1.00      2.2±0.01ms        ? ?/sec
physical_plan_clickbench_q38                          1.01      2.3±0.01ms        ? ?/sec    1.00      2.3±0.01ms        ? ?/sec
physical_plan_clickbench_q39                          1.00      2.1±0.00ms        ? ?/sec    1.00      2.1±0.01ms        ? ?/sec
physical_plan_clickbench_q4                           1.02   1203.1±7.63µs        ? ?/sec    1.00   1174.5±4.45µs        ? ?/sec
physical_plan_clickbench_q40                          1.00      2.6±0.01ms        ? ?/sec    1.00      2.7±0.01ms        ? ?/sec
physical_plan_clickbench_q41                          1.00      2.3±0.00ms        ? ?/sec    1.01      2.3±0.02ms        ? ?/sec
physical_plan_clickbench_q42                          1.00      2.3±0.00ms        ? ?/sec    1.01      2.3±0.02ms        ? ?/sec
physical_plan_clickbench_q43                          1.00      2.4±0.01ms        ? ?/sec    1.00      2.4±0.01ms        ? ?/sec
physical_plan_clickbench_q44                          1.00   1277.5±3.40µs        ? ?/sec    1.00  1283.8±82.14µs        ? ?/sec
physical_plan_clickbench_q45                          1.01   1288.7±3.40µs        ? ?/sec    1.00   1276.8±4.74µs        ? ?/sec
physical_plan_clickbench_q46                          1.01   1600.6±5.33µs        ? ?/sec    1.00   1587.8±4.16µs        ? ?/sec
physical_plan_clickbench_q47                          1.00      2.3±0.00ms        ? ?/sec    1.00      2.3±0.01ms        ? ?/sec
physical_plan_clickbench_q48                          1.00      2.4±0.01ms        ? ?/sec    1.00      2.4±0.00ms        ? ?/sec
physical_plan_clickbench_q49                          1.00      2.6±0.01ms        ? ?/sec    1.00      2.6±0.02ms        ? ?/sec
physical_plan_clickbench_q5                           1.02  1348.7±10.09µs        ? ?/sec    1.00   1322.2±9.81µs        ? ?/sec
physical_plan_clickbench_q50                          1.00      2.5±0.00ms        ? ?/sec    1.00      2.5±0.01ms        ? ?/sec
physical_plan_clickbench_q51                          1.01   1710.3±5.26µs        ? ?/sec    1.00   1701.1±5.90µs        ? ?/sec
physical_plan_clickbench_q6                           1.02   1342.8±3.34µs        ? ?/sec    1.00   1315.4±4.55µs        ? ?/sec
physical_plan_clickbench_q7                           1.02   1141.0±4.53µs        ? ?/sec    1.00   1116.8±4.27µs        ? ?/sec
physical_plan_clickbench_q8                           1.02   1616.5±4.14µs        ? ?/sec    1.00   1590.6±7.45µs        ? ?/sec
physical_plan_clickbench_q9                           1.02   1648.9±3.88µs        ? ?/sec    1.00   1616.9±3.79µs        ? ?/sec
physical_plan_struct_join_agg_sort                    1.00   1313.4±2.41µs        ? ?/sec    1.03   1355.5±2.67µs        ? ?/sec
physical_plan_tpcds_all                               1.00    752.3±3.95ms        ? ?/sec    1.01    763.4±5.21ms        ? ?/sec
physical_plan_tpch_all                                1.00     47.0±0.08ms        ? ?/sec    1.02     47.8±0.21ms        ? ?/sec
physical_plan_tpch_q1                                 1.00   1496.5±2.36µs        ? ?/sec    1.01   1518.0±2.59µs        ? ?/sec
physical_plan_tpch_q10                                1.00      2.9±0.01ms        ? ?/sec    1.00      2.9±0.00ms        ? ?/sec
physical_plan_tpch_q11                                1.00      2.5±0.00ms        ? ?/sec    1.00      2.5±0.00ms        ? ?/sec
physical_plan_tpch_q12                                1.00   1278.6±3.33µs        ? ?/sec    1.00   1274.3±2.18µs        ? ?/sec
physical_plan_tpch_q13                                1.00    994.3±2.77µs        ? ?/sec    1.00    991.9±2.28µs        ? ?/sec
physical_plan_tpch_q14                                1.00   1301.6±2.78µs        ? ?/sec    1.01   1320.7±2.07µs        ? ?/sec
physical_plan_tpch_q16                                1.00   1651.9±2.71µs        ? ?/sec    1.00   1651.6±3.78µs        ? ?/sec
physical_plan_tpch_q17                                1.00   1782.3±2.69µs        ? ?/sec    1.01   1803.7±3.86µs        ? ?/sec
physical_plan_tpch_q18                                1.00   1915.9±3.66µs        ? ?/sec    1.01   1939.8±2.67µs        ? ?/sec
physical_plan_tpch_q19                                1.00      2.5±0.01ms        ? ?/sec    1.01      2.5±0.00ms        ? ?/sec
physical_plan_tpch_q2                                 1.00      4.4±0.00ms        ? ?/sec    1.01      4.5±0.02ms        ? ?/sec
physical_plan_tpch_q20                                1.00      2.2±0.00ms        ? ?/sec    1.01      2.2±0.00ms        ? ?/sec
physical_plan_tpch_q21                                1.00      3.0±0.00ms        ? ?/sec    1.01      3.0±0.00ms        ? ?/sec
physical_plan_tpch_q22                                1.00      2.0±0.01ms        ? ?/sec    1.01      2.0±0.00ms        ? ?/sec
physical_plan_tpch_q3                                 1.00   1912.3±3.21µs        ? ?/sec    1.00   1908.7±2.75µs        ? ?/sec
physical_plan_tpch_q4                                 1.01   1032.5±2.44µs        ? ?/sec    1.00   1021.9±8.61µs        ? ?/sec
physical_plan_tpch_q5                                 1.01      2.5±0.01ms        ? ?/sec    1.00      2.4±0.00ms        ? ?/sec
physical_plan_tpch_q6                                 1.00    634.6±5.11µs        ? ?/sec    1.00    634.4±4.08µs        ? ?/sec
physical_plan_tpch_q7                                 1.00      3.0±0.00ms        ? ?/sec    1.02      3.1±0.00ms        ? ?/sec
physical_plan_tpch_q8                                 1.00      4.1±0.02ms        ? ?/sec    1.00      4.1±0.01ms        ? ?/sec
physical_plan_tpch_q9                                 1.00      3.0±0.00ms        ? ?/sec    1.00      3.0±0.00ms        ? ?/sec
physical_select_aggregates_from_200                   1.00     14.6±0.07ms        ? ?/sec    1.01     14.8±0.11ms        ? ?/sec
physical_select_all_from_1000                         1.03     18.1±0.09ms        ? ?/sec    1.00     17.5±0.07ms        ? ?/sec
physical_select_one_from_700                          1.00    773.9±5.33µs        ? ?/sec    1.01    783.4±2.15µs        ? ?/sec
physical_sorted_union_order_by_10_int64               1.00      4.7±0.01ms        ? ?/sec    1.00      4.8±0.01ms        ? ?/sec
physical_sorted_union_order_by_10_uint64              1.00     11.8±0.03ms        ? ?/sec    1.00     11.7±0.05ms        ? ?/sec
physical_sorted_union_order_by_50_int64               1.00    116.9±0.37ms        ? ?/sec    1.01    117.8±0.41ms        ? ?/sec
physical_sorted_union_order_by_50_uint64              1.00    612.6±2.27ms        ? ?/sec    1.02    621.8±3.55ms        ? ?/sec
physical_theta_join_consider_sort                     1.00  1050.0±13.48µs        ? ?/sec    1.01   1055.9±2.64µs        ? ?/sec
physical_unnest_to_join                               1.00   1207.9±8.01µs        ? ?/sec    1.01   1218.9±2.63µs        ? ?/sec
physical_window_function_partition_by_12_on_values    1.00    736.9±4.01µs        ? ?/sec    1.01    747.9±1.83µs        ? ?/sec
physical_window_function_partition_by_30_on_values    1.00   1485.1±4.37µs        ? ?/sec    1.02   1508.9±3.20µs        ? ?/sec
physical_window_function_partition_by_4_on_values     1.00    424.0±1.68µs        ? ?/sec    1.06    447.8±4.60µs        ? ?/sec
physical_window_function_partition_by_7_on_values     1.00    534.8±2.53µs        ? ?/sec    1.03    553.2±1.59µs        ? ?/sec
physical_window_function_partition_by_8_on_values     1.00    587.7±5.47µs        ? ?/sec    1.02    596.8±2.20µs        ? ?/sec
with_param_values_many_columns                        1.01    466.0±2.49µs        ? ?/sec    1.00    463.3±2.56µs        ? ?/sec

Resource Usage

base (merge-base)

Metric Value
Wall time 1254.3s
Peak memory 18.5 GiB
Avg memory 18.5 GiB
CPU user 1499.3s
CPU sys 1.7s
Disk read 0 B
Disk write 647.4 MiB

branch

Metric Value
Wall time 1253.4s
Peak memory 18.5 GiB
Avg memory 18.5 GiB
CPU user 1499.5s
CPU sys 1.2s
Disk read 0 B
Disk write 23.9 MiB

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common Related to common crate core Core DataFusion crate datasource Changes to the datasource crate execution Related to the execution crate functions Changes to functions implementation logical-expr Logical plan and expressions optimizer Optimizer rules physical-expr Changes to the physical-expr crates physical-plan Changes to the physical-plan crate proto Related to proto crate spark sql SQL Planner substrait Changes to the substrait crate

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