acp: add native Zephyr drivers for AMD ACP 7.0 (includes Zephyr west.yml update)

app/boards/acp_6_0_adsp.conf

@@ -8,3 +8,33 @@ CONFIG_ZEPHYR_LOG=n
 CONFIG_DMA=y
 CONFIG_ZEPHYR_NATIVE_DRIVERS=n
 CONFIG_AMS=n
+CONFIG_COMP_SRC=n
+CONFIG_COMP_FIR=n
+CONFIG_COMP_IIR=n
+CONFIG_COMP_DCBLOCK=n
+CONFIG_COMP_CROSSOVER=n
+CONFIG_COMP_DRC=n
+CONFIG_COMP_MULTIBAND_DRC=n
+CONFIG_COMP_TONE=n
+CONFIG_COMP_KPB=n
+CONFIG_MAXIM_DSM=n
+CONFIG_COMP_ASRC=n
+CONFIG_COMP_IGO_NR=n
+CONFIG_COMP_COPIER=n
+CONFIG_COMP_RTNR=n
+CONFIG_COMP_ARIA=n
+CONFIG_COMP_BASEFW_IPC4=n
+CONFIG_COMP_UP_DOWN_MIXER=n
+CONFIG_COMP_TDFB=n
+CONFIG_COMP_SEL=n
+CONFIG_COMP_MIXER=n
+CONFIG_ASRC_SUPPORT_CONVERSION_24000_TO_08000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_24000_TO_16000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_08000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_11025=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_12000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_16000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_22050=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_24000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_32000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_44100=n

app/boards/acp_7_0_adsp.conf

@@ -0,0 +1,50 @@
+CONFIG_ACP_7_0=y
+CONFIG_HAVE_AGENT=n
+CONFIG_DCACHE_LINE_SIZE_DETECT=n
+CONFIG_DCACHE_LINE_SIZE=128
+CONFIG_DYNAMIC_INTERRUPTS=y
+CONFIG_SHARED_INTERRUPTS=n
+CONFIG_ZEPHYR_LOG=n
+CONFIG_DMA=y
+CONFIG_DMA_DOMAIN=n
+CONFIG_ZEPHYR_NATIVE_DRIVERS=y
+CONFIG_INTC_AMD_ACP=y
+CONFIG_DMA_AMD_ACP_HOST=y
+CONFIG_DMA_AMD_ACP_SDW=y
+CONFIG_DAI_AMD_SDW=y
+CONFIG_AMS=n
+CONFIG_WRAP_ACTUAL_POSITION=y
+CONFIG_TRACE=n
+CONFIG_COMP_VOLUME=y
+CONFIG_COMP_SRC=n
+CONFIG_COMP_FIR=n
+CONFIG_COMP_IIR=n
+CONFIG_COMP_DCBLOCK=n
+CONFIG_COMP_CROSSOVER=n
+CONFIG_COMP_DRC=n
+CONFIG_COMP_MULTIBAND_DRC=n
+CONFIG_COMP_TONE=n
+CONFIG_COMP_KPB=n
+CONFIG_MAXIM_DSM=n
+CONFIG_COMP_ASRC=n
+CONFIG_COMP_IGO_NR=n
+CONFIG_COMP_COPIER=n
+CONFIG_COMP_RTNR=n
+CONFIG_COMP_ARIA=n
+CONFIG_COMP_BASEFW_IPC4=n
+CONFIG_COMP_UP_DOWN_MIXER=n
+CONFIG_COMP_TDFB=n
+CONFIG_COMP_SEL=n
+CONFIG_COMP_MIXER=n
+CONFIG_ASRC_SUPPORT_CONVERSION_24000_TO_08000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_24000_TO_16000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_08000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_11025=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_12000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_16000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_22050=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_24000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_32000=n
+CONFIG_ASRC_SUPPORT_CONVERSION_48000_TO_44100=n
+CONFIG_CORE_COUNT=1
+CONFIG_FORMAT_CONVERT_HIFI3=n

scripts/xtensa-build-zephyr.py

@@ -111,6 +111,12 @@ class PlatformConfig:
 		"rmb_LX7_HiFi5_PROD",
 		RIMAGE_KEY = "key param ignored by acp_6_0"
 	),
+	"acp_7_0" : PlatformConfig(
+		"amd", "acp_7_0_adsp/acp_7_0",
+		f"RI-2023.11{xtensa_tools_version_postfix}",
+		"ACP_7_0_HiFi5_NNE_PROD",
+		RIMAGE_KEY = "key param ignored by acp_7_0"
+	),
 	# MediaTek platforms
 	# (move to platform_configs_all on next Zephyr SDK release after 0.17.0)
 	"mt8195" : PlatformConfig(
@@ -1305,7 +1311,7 @@ def gzip_compress(fname, gzdst=None):
 RI_INFO_UNSUPPORTED = []
 
 RI_INFO_UNSUPPORTED += ['imx8', 'imx8x', 'imx8m', 'imx8ulp', 'imx95']
-RI_INFO_UNSUPPORTED += ['rn', 'acp_6_0']
+RI_INFO_UNSUPPORTED += ['acp_6_0','acp_7_0']
 RI_INFO_UNSUPPORTED += ['mt8186', 'mt8188', 'mt8195', 'mt8196', 'mt8365']
 RI_INFO_UNSUPPORTED += ['qemu_xtensa', 'qemu_xtensa_mmu']
 

src/arch/xtensa/configs/acp_7_0_defconfig

@@ -30,7 +30,7 @@ CONFIG_COMP_ARIA=n
 CONFIG_COMP_BASEFW_IPC4=n
 CONFIG_COMP_UP_DOWN_MIXER=n
 CONFIG_COMP_TDFB=n
-#CONFIG_COMP_MUX=n
+CONFIG_COMP_MUX=n
 CONFIG_COMP_SEL=n
 CONFIG_COMP_MIXER=n
-CONFIG_AMD_BINARY_BUILD=n
+CONFIG_PROBE=n

src/audio/dai-zephyr.c

@@ -192,6 +192,10 @@ __cold int dai_set_config(struct dai *dai, struct ipc_config_dai *common_config,
 		cfg.type = DAI_IMX_MICFIL;
 		cfg_params = &sof_cfg->micfil;
 		break;
+	case SOF_DAI_AMD_SDW:
+		cfg.type = DAI_AMD_SDW;
+		cfg_params = &sof_cfg->acpsdw;
+		break;
 	case SOF_DAI_INTEL_UAOL:
 		cfg.type = DAI_INTEL_UAOL;
 		cfg.channels = common_config->gtw_fmt->channels_count;

src/drivers/amd/common/acp_bt_dai.c

@@ -1,9 +1,10 @@
 // SPDX-License-Identifier: BSD-3-Clause
 //
-//Copyright(c) 2023 AMD. All rights reserved.
+//Copyright(c) 2023, 2026 AMD. All rights reserved.
 //
 //Author:	Basavaraj Hiregoudar <basavaraj.hiregoudar@amd.com>
 //		SaiSurya, Ch <saisurya.chakkaveeravenkatanaga@amd.com>
+//      Sivasubramanian <sravisar@amd.com>
 
 #include <sof/audio/component.h>
 #include <sof/drivers/acp_dai_dma.h>
@@ -79,8 +80,8 @@ const struct dai_driver acp_btdai_driver = {
 	.type	  = SOF_DAI_AMD_BT,
 	.uid	  = SOF_UUID(btdai_uuid),
 	.tctx	  = &btdai_tr,
-	.dma_dev  = DMA_DEV_BT,
-	.dma_caps = DMA_CAP_BT,
+	.dma_dev  = SOF_DMA_DEV_BT,
+	.dma_caps = SOF_DMA_CAP_BT,
 	.ops = {
 		.trigger		= btdai_trigger,
 		.set_config		= btdai_set_config,

src/drivers/amd/common/acp_dmic_dai.c

@@ -1,9 +1,10 @@
 // SPDX-License-Identifier: BSD-3-Clause
 //
-//Copyright(c) 2023 AMD. All rights reserved.
+//Copyright(c) 2023, 2026 AMD. All rights reserved.
 //
 // Author:	Basavaraj Hiregoudar <basavaraj.hiregoudar@amd.com>
 //		SaiSurya, Ch <saisurya.chakkaveeravenkatanaga@amd.com>
+//      Sivasubramanian <sravisar@amd.com>
 
 #include <sof/audio/component.h>
 #include <sof/drivers/acp_dai_dma.h>
@@ -157,8 +158,8 @@ const struct dai_driver acp_dmic_dai_driver = {
 	.type = SOF_DAI_AMD_DMIC,
 	.uid = SOF_UUID(acp_dmic_dai_uuid),
 	.tctx = &acp_dmic_dai_tr,
-	.dma_dev = DMA_DEV_DMIC,
-	.dma_caps = DMA_CAP_DMIC,
+	.dma_dev = SOF_DMA_DEV_DMIC,
+	.dma_caps = SOF_DMA_CAP_DMIC,
 	.ops = {
 		.trigger		= acp_dmic_dai_trigger,
 		.set_config		= acp_dmic_dai_set_config,

src/drivers/amd/common/ipc.c

@@ -1,13 +1,12 @@
 // SPDX-License-Identifier: BSD-3-Clause
 //
-//Copyright(c) 2023 AMD. All rights reserved.
+//Copyright(c) 2023, 2026 AMD. All rights reserved.
 //
 //Author:       Basavaraj Hiregoudar <basavaraj.hiregoudar@amd.com>
 //              SaiSurya, Ch <saisurya.chakkaveeravenkatanaga@amd.com>
+//              Sivasubramanian <sravisar@amd.com>
 
 #include <rtos/panic.h>
-#include <platform/chip_offset_byte.h>
-#include <platform/chip_registers.h>
 #include <rtos/interrupt.h>
 #include <sof/ipc/driver.h>
 #include <sof/ipc/msg.h>
@@ -91,7 +90,7 @@ int platform_ipc_init(struct ipc *ipc)
 	/* schedule */
 	schedule_task_init_edf(&ipc->ipc_task, SOF_UUID(ipc_task_amd_uuid),
 			       &ipc_task_ops, ipc, 0, 0);
-	arch_interrupt_clear(IRQ_NUM_EXT_LEVEL3);
+	interrupt_disable(IRQ_NUM_EXT_LEVEL3, ipc);
 	interrupt_register(IRQ_NUM_EXT_LEVEL3, amd_irq_handler, ipc);
 	/* Enabling software interuppts */
 	interrupt_enable(IRQ_NUM_EXT_LEVEL3, ipc);

src/drivers/amd/rembrandt/acp_hs_dai.c

@@ -1,9 +1,10 @@
 // SPDX-License-Identifier: BSD-3-Clause
 //
-//Copyright(c) 2022 AMD. All rights reserved.
+//Copyright(c) 2022, 2026 AMD. All rights reserved.
 //
 //Author:       Basavaraj Hiregoudar <basavaraj.hiregoudar@amd.com>
 //              Bala Kishore <balakishore.pati@amd.com>
+//              Sivasubramanian <sravisar@amd.com>
 
 #include <sof/audio/component.h>
 #include <sof/drivers/acp_dai_dma.h>
@@ -193,8 +194,8 @@ const struct dai_driver acp_hsdai_driver = {
 	.type = SOF_DAI_AMD_HS,
 	.uid = SOF_UUID(hsdai_uuid),
 	.tctx = &hsdai_tr,
-	.dma_dev = DMA_DEV_SP,
-	.dma_caps = DMA_CAP_SP,
+	.dma_dev = SOF_DMA_DEV_SP,
+	.dma_caps = SOF_DMA_CAP_SP,
 	.ops = {
 		.trigger		= hsdai_trigger,
 		.set_config		= hsdai_set_config,

src/drivers/amd/rembrandt/acp_sp_dai.c

@@ -1,9 +1,10 @@
 // SPDX-License-Identifier: BSD-3-Clause
 //
-//Copyright(c) 2022 AMD. All rights reserved.
+//Copyright(c) 2022, 2026 AMD. All rights reserved.
 //
 //Author:       Basavaraj Hiregoudar <basavaraj.hiregoudar@amd.com>
 //              Bala Kishore <balakishore.pati@amd.com>
+//              Sivasubramanian <sravisar@amd.com>
 
 #include <sof/audio/component.h>
 #include <sof/drivers/acp_dai_dma.h>
@@ -79,8 +80,8 @@ const struct dai_driver acp_spdai_driver = {
 	.type = SOF_DAI_AMD_SP,
 	.uid = SOF_UUID(spdai_uuid),
 	.tctx = &spdai_tr,
-	.dma_dev = DMA_DEV_SP,
-	.dma_caps = DMA_CAP_SP,
+	.dma_dev = SOF_DMA_DEV_SP,
+	.dma_caps = SOF_DMA_CAP_SP,
 	.ops = {
 		.trigger		= spdai_trigger,
 		.set_config		= spdai_set_config,

src/drivers/amd/rembrandt/acp_sw_audio_dai.c

@@ -1,9 +1,10 @@
 // SPDX-License-Identifier: BSD-3-Clause
 //
-//Copyright(c) 2023 AMD. All rights reserved.
+//Copyright(c) 2023, 2026 AMD. All rights reserved.
 //
 //Author:       Basavaraj Hiregoudar <basavaraj.hiregoudar@amd.com>
 //              Maruthi Machani <maruthi.machani@amd.com>
+//              Sivasubramanian <sravisar@amd.com>
 
 #include <sof/drivers/acp_dai_dma.h>
 #include <sof/lib/uuid.h>
@@ -95,7 +96,7 @@ static int swaudiodai_get_hw_params(struct dai *dai,
 }
 
 const struct dai_driver acp_swaudiodai_driver = {
-	.type = SOF_DAI_AMD_SW_AUDIO,
+	.type = SOF_DAI_AMD_SDW,
 	.uid = SOF_UUID(swaudiodai_uuid),
 	.tctx = &swaudiodai_tr,
 	.dma_dev = DMA_DEV_SW,

src/drivers/amd/rembrandt/ipc.c

@@ -1,13 +1,11 @@
 // SPDX-License-Identifier: BSD-3-Clause
 //
-//Copyright(c) 2022 AMD. All rights reserved.
+//Copyright(c) 2022, 2026 AMD. All rights reserved.
 //
 //Author:       Basavaraj Hiregoudar <basavaraj.hiregoudar@amd.com>
 //              Bala Kishore <balakishore.pati@amd.com>
-
+//              Sivasubramanian <sravisar@amd.com>
 #include <rtos/panic.h>
-#include <platform/chip_offset_byte.h>
-#include <platform/chip_registers.h>
 #include <rtos/interrupt.h>
 #include <sof/ipc/driver.h>
 #include <sof/ipc/msg.h>
@@ -32,9 +30,39 @@
 #include <platform/platform.h>
 #include <platform/ipc.h>
 
+#define HOST_TO_DSP_INTR 1
+#define INTERRUPT_DISABLE 0
+LOG_MODULE_REGISTER(ipc1, CONFIG_SOF_LOG_LEVEL);
 volatile acp_scratch_mem_config_t *pscratch_mem_cfg = (volatile acp_scratch_mem_config_t *)
 						      (PU_SCRATCH_REG_BASE + SCRATCH_REG_OFFSET);
 
+#ifdef CONFIG_ZEPHYR_NATIVE_DRIVERS
+/* Clear the Acknowledge ( status) for the host to DSP interrupt */
+void acp_ack_intr_from_host(void)
+{
+	/* acknowledge the host interrupt */
+	acp_dsp_sw_intr_stat_t sw_intr_stat;
+
+	sw_intr_stat.u32all = 0;
+	sw_intr_stat.bits.host_to_dsp0_intr1_stat = INTERRUPT_ENABLE;
+	io_reg_write((PU_REGISTER_BASE + ACP_DSP_SW_INTR_STAT), sw_intr_stat.u32all);
+}
+
+/* This function triggers a host interrupt from ACP DSP */
+void acp_dsp_to_host_intr_trig(void)
+{
+	acp_sw_intr_trig_t  sw_intr_trig;
+
+	/* Read the Software Interrupt controller register and update */
+	sw_intr_trig = (acp_sw_intr_trig_t)io_reg_read(PU_REGISTER_BASE +
+						ACP_SW_INTR_TRIG);
+	/* Configures the trigger bit in ACP_DSP_SW_INTR_TRIG register */
+	sw_intr_trig.bits.trig_dsp0_to_host_intr = INTERRUPT_ENABLE;
+	/* Write the Software Interrupt controller register */
+	io_reg_write((PU_REGISTER_BASE + ACP_SW_INTR_TRIG), sw_intr_trig.u32all);
+}
+#endif /* CONFIG_ZEPHYR_NATIVE_DRIVERS */
+
 void amd_irq_handler(void *arg)
 {
 	struct ipc *ipc = arg;

src/include/ipc/dai.h

@@ -95,7 +95,7 @@ enum sof_ipc_dai_type {
 	SOF_DAI_AMD_SP_VIRTUAL,		/**<Amd SP VIRTUAL */
 	SOF_DAI_AMD_HS_VIRTUAL,		/**<Amd HS VIRTUAL */
 	SOF_DAI_IMX_MICFIL,		/**< i.MX MICFIL */
-	SOF_DAI_AMD_SW_AUDIO,		/**<Amd SW AUDIO */
+	SOF_DAI_AMD_SDW,		/**< Amd SDW */
 	SOF_DAI_INTEL_UAOL,		/**< Intel UAOL */
 };
 

src/ipc/ipc3/dai.c

@@ -93,9 +93,14 @@ int dai_config_dma_channel(struct dai_data *dd, struct comp_dev *dev, const void
 		break;
 	case SOF_DAI_AMD_HS:
 	case SOF_DAI_AMD_HS_VIRTUAL:
-	case SOF_DAI_AMD_SW_AUDIO:
+	case SOF_DAI_AMD_SDW:
 		channel = dai_get_handshake(dd->dai, dai->direction,
 					    dd->stream_id);
+#if defined(CONFIG_SOC_ACP_7_0)
+		if (channel >= 64 && channel < 128) {
+		channel = channel - 64;
+		}
+#endif
 		break;
 	case SOF_DAI_MEDIATEK_AFE:
 		handshake = dai_get_handshake(dd->dai, dai->direction,
@@ -188,8 +193,28 @@ int ipc_dai_data_config(struct dai_data *dd, struct comp_dev *dev)
 		break;
 	case SOF_DAI_AMD_HS:
 	case SOF_DAI_AMD_HS_VIRTUAL:
-	case SOF_DAI_AMD_SW_AUDIO:
-		dev->ipc_config.frame_fmt = SOF_IPC_FRAME_S16_LE;
+	case SOF_DAI_AMD_SDW:
+#if defined(CONFIG_AMD) && !defined(CONFIG_SOC_ACP_6_0)
+	{
+		struct acp_dma_dev_data *dev_data = dd->dma->z_dev->data;
+		struct sdw_pin_data *pin_data;
+
+		/* Allocate memory only if not already allocated */
+		if (!dev_data->dai_index_ptr) {
+			pin_data = rzalloc(SOF_MEM_FLAG_USER | SOF_MEM_FLAG_COHERENT,
+					   sizeof(*pin_data));
+			dev_data->dai_index_ptr = pin_data;
+		} else {
+			pin_data = dev_data->dai_index_ptr;
+		}
+		pin_data->pin_num = dd->dai->index;
+		pin_data->pin_dir = dai->direction;
+		pin_data->dma_channel = dd->chan ? dd->chan->index : 0xFFFF;
+		pin_data->index = 0xFFFF;
+		pin_data->instance = 0xFFFF;
+		dev_data->dai_index_ptr = pin_data;
+	}
+#endif
 		break;
 	case SOF_DAI_MEDIATEK_AFE:
 		break;