Add RISC-V Zvbc vector CRC32C acceleration by Felix-Gong · Pull Request #3332 · apache/brpc

Felix-Gong · 2026-06-05T15:05:10Z

Summary

Implement CRC32C using RISC-V Zvbc vector carry-less multiplication (vclmul/vclmulh RVV intrinsics)
Processes 4 lanes of 128-bit folding per iteration (64 bytes), with 4-to-1 lane reduction and Barrett reduction
Add WITH_RISCV_ZVBC cmake option
Zvbc preferred over Zbc in Choose_Extend() for higher throughput

Background

This extends the existing Zbc scalar CRC32C optimization (merged in #3312) with vector support. The implementation follows the same 128-bit folding + Barrett reduction approach used in x86 SSE4.2 and ARM PMULL.

Key implementation details

With VLEN=128, each vector register holds 2×64-bit elements, so 2 vector register pairs = 128-bit lane
Fold constants: k1=0x740eef02 (x^256 mod P), k2=0x9e4addf8 (x^320 mod P), k3=0xf20c0dfe (x^128 mod P), k4=0x493c7d27 (x^192 mod P)
Cross-element XOR via scalar extraction (practical for VLEN=128 with only 2 elements)
Barrett reduction uses scalar clmul/clmulh (Zbc instructions, available when Zvbc is present)

Testing

Verified on QEMU with -cpu rv64,zvbc=true,v=true,vlen=128:

All RFC 3720 B.4 test vectors pass
Large data (64/128/256/1024 bytes) results match x86 SSE4.2 reference values
Extend (chained CRC) works correctly
Zvbc and Zbc paths produce identical results

Build

cmake -DWITH_RISCV_ZVBC=ON ..

Copilot

Pull request overview

This PR adds a new RISC-V CRC32C fast path using the Zvbc vector carry-less multiply instructions (RVV vclmul/vclmulh), along with a CMake option to enable compiling that path and runtime selection logic that prefers Zvbc over the existing Zbc scalar optimization.

Changes:

Add rv_crc32c_vclmul (RVV-based CRC32C folding + Barrett reduction) and isZvbc() runtime detection.
Update runtime dispatch (Choose_Extend / IsFastCrc32Supported) to prefer Zvbc when available, otherwise fall back to Zbc scalar.
Add WITH_RISCV_ZVBC CMake option and set -march accordingly.

Reviewed changes

Copilot reviewed 2 out of 2 changed files in this pull request and generated 4 comments.

File	Description
`src/butil/crc32c.cc`	Adds the Zvbc vector CRC32C implementation and runtime selection logic.
`CMakeLists.txt`	Adds build option/flags to enable compiling the Zvbc path on riscv64.

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Felix-Gong · 2026-06-06T04:39:53Z

+  // Set up RVV for 64-bit elements: vl = min(VLEN/64, 2) = 2 for VLEN=128
+  size_t vl = __riscv_vsetvl_e64m1(2);


Fixed. Added a vl < 2 check after __riscv_vsetvl_e64m1(2) that falls back to the bitwise path if VLEN < 128.

Felix-Gong · 2026-06-06T04:40:00Z

+        if(WITH_RISCV_ZVBC)
+            set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=rv64gc_zbc_zvbc")
+        elseif(WITH_RISCV_ZBC)


Fixed. Changed -march=rv64gc_zbc_zvbc to -march=rv64gcv_zbc_zvbc to include the base RVV extension.

Felix-Gong · 2026-06-06T04:40:07Z

+  vuint64m1_t lane1 = __riscv_vle64_v_u64m1((const uint64_t*)(p + 0), vl);
+  vuint64m1_t lane2 = __riscv_vle64_v_u64m1((const uint64_t*)(p + 16), vl);
+  vuint64m1_t lane3 = __riscv_vle64_v_u64m1((const uint64_t*)(p + 32), vl);
+  vuint64m1_t lane4 = __riscv_vle64_v_u64m1((const uint64_t*)(p + 48), vl);


Fixed. All vector loads now go through memcpy into a uint64_t[2] staging buffer before vle64, avoiding the uint8_t*-to-uint64_t* cast.

Felix-Gong · 2026-06-06T04:40:16Z

+      if (strstr(line, "isa") || strstr(line, "hart isa")) {
+        char* colon = strchr(line, ':');
+        if (colon) {
+          if (strstr(colon, "_zvbc") || strstr(colon, "zvbc")) {
+            supported = true;


Fixed. Both isZbc() and isZvbc() now only match _zbc and _zvbc (with underscore prefix), removing the bare zbc/zvbc substring checks that could cause false positives.

wwbmmm · 2026-06-07T12:38:35Z

LGTM

Felix-Gong · 2026-06-14T09:18:49Z

Hi @chenBright, I've updated the PR based on Copilot's review. Could you take a look when you have time? Thanks!

chenBright · 2026-07-07T06:41:25Z

        # RISC-V specific optimizations
        option(WITH_RISCV_ZBC "Enable RISC-V Zbc carry-less multiplication for CRC32C acceleration" OFF)
-        if(WITH_RISCV_ZBC)
+        option(WITH_RISCV_ZVBC "Enable RISC-V Zvbc vector carry-less multiplication for CRC32C acceleration" OFF)


Do the bazel and make build methods also need to support the corresponding switches?

@chenBright Thanks for the suggestion! I've added ZVBC/ZBC support to the Makefile.
Regarding Bazel: The current Bazel build configuration (BUILD.bazel / .bazelrc) does not have RISC-V specific settings. Adding Bazel support would require more extensive changes to the build system. I'd suggest addressing Bazel support in a separate PR if needed.

You should use config_brpc.sh instead of Makefile for configuration.

Thanks for the correction. Looking at the branch again, the ZVBC/ZBC build options are actually already in config_brpc.sh (not the Makefile) — the Makefile change was never part of this PR. The config_brpc.sh changes were included along with the CMakeLists.txt update. So the build configuration approach already follows your suggestion.

Implement CRC32C using Zvbc vector carry-less multiplication (vclmul/vclmulh RVV intrinsics). Processes 4 lanes of 128-bit folding per iteration (64 bytes), with 4-to-1 lane reduction and Barrett reduction for finalization. - Add rv_crc32c_vclmul() using vclmul/vclmulh intrinsics - Add isZvbc() runtime detection via /proc/cpuinfo - Add WITH_RISCV_ZVBC cmake option - Fix macro guards: support __riscv_zvbc without __riscv_zbc - Zvbc preferred over Zbc in Choose_Extend() Signed-off-by: Xiaofei Gong <gongxiaofei24@iscas.ac.cn> Signed-off-by: YuanSheng <yuansheng@isrc.iscas.ac.cn>

…flag - Add vl<2 fallback for VLEN<128 (prevents UB from uninitialized elements) - Use memcpy instead of uint8_t*-to-uint64_t* casts (strict-aliasing safe) - Tighten /proc/cpuinfo ISA matching to _zbc/_zvbc only (prevents _zvbc falsely matching zbc) - Add missing 'v' base extension in -march flag (rv64gcv_zbc_zvbc) Signed-off-by: Xiaofei Gong <gongxiaofei24@iscas.ac.cn> Signed-off-by: YuanSheng <yuansheng@isrc.iscas.ac.cn>

Add --with-riscv-zvbc and --with-riscv-zbc options to config_brpc.sh for RISC-V CRC32C acceleration. This allows building with: - --with-riscv-zvbc: -march=rv64gcv_zbc_zvbc - --with-riscv-zbc: -march=rv64gc_zbc Usage: ./config_brpc.sh --with-riscv-zvbc --headers=/usr/include --libs=/usr/lib64 Signed-off-by: Xiaofei Gong <gongxiaofei24@iscas.ac.cn> Signed-off-by: YuanSheng <yuansheng@isrc.iscas.ac.cn>

Address review comment: rename camelCase functions to snake_case following Google C++ Style Guide. Signed-off-by: Xiaofei Gong <gongxiaofei24@iscas.ac.cn> Signed-off-by: YuanSheng <yuansheng@isrc.iscas.ac.cn>

chenBright

LGTM

chenBright requested a review from Copilot June 6, 2026 02:13

Copilot started reviewing on behalf of chenBright June 6, 2026 02:13 View session

Copilot AI reviewed Jun 6, 2026

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Felix-Gong force-pushed the riscv-crc32c-zvbc-impl branch 2 times, most recently from 4d8e965 to f168839 Compare July 7, 2026 03:41

Felix-Gong closed this Jul 7, 2026

Felix-Gong reopened this Jul 7, 2026

chenBright reviewed Jul 7, 2026

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Felix-Gong force-pushed the riscv-crc32c-zvbc-impl branch 3 times, most recently from 1dead1d to e5f8ea8 Compare July 7, 2026 13:43

Felix-Gong added 3 commits July 7, 2026 14:55

Felix-Gong force-pushed the riscv-crc32c-zvbc-impl branch from e5f8ea8 to 63700f9 Compare July 7, 2026 15:01

chenBright reviewed Jul 8, 2026

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Comment thread src/butil/crc32c.cc Outdated

Rename isZvbc/isZbc to snake_case for consistency

56c0bfa

Address review comment: rename camelCase functions to snake_case following Google C++ Style Guide. Signed-off-by: Xiaofei Gong <gongxiaofei24@iscas.ac.cn> Signed-off-by: YuanSheng <yuansheng@isrc.iscas.ac.cn>

chenBright approved these changes Jul 8, 2026

View reviewed changes

chenBright merged commit 0f82084 into apache:master Jul 8, 2026
15 checks passed

		// Set up RVV for 64-bit elements: vl = min(VLEN/64, 2) = 2 for VLEN=128
		size_t vl = __riscv_vsetvl_e64m1(2);

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Felix-Gong commented Jun 5, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

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Summary

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wwbmmm commented Jun 7, 2026

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Felix-Gong commented Jun 5, 2026 •

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