[AMD][MI35X] Qwen3.5-fp4 SGLang single-node benchmark env update

[yichiche]

see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=29333759620
see unofficial run visualizer at https://inferencex.semianalysis.com/evaluation?unofficialRun=29333759620

[github-actions]

Thanks for the contribution! Please reach out to respective companies' CODEOWNER to fill in the latest PR_REVIEW_CHECKLIST.md before pinging core maintainer on Slack for review. In order for the signoff PR check bot to trigger, you must follow the PR_REVIEW_CHECKLIST.md template correctly, including the phrase As a PR reviewer and CODEOWNER, I have reviewed this and have.

For PR verification, add the full-sweep-fail-fast label (strongly recommended) to this PR — the benchmark sweep only runs on labeled PRs. Use full-sweep-enabled only if you need matrix jobs to keep running past a failure.

PR authors are responsible for ensuring that after merging, all GitHub Action jobs fully pass. A lot of the time, failures are just flakes and simply re-running the failed jobs will fix it. See GitHub's docs on re-running failed jobs

---

感谢你的贡献！请联系相应公司的 CODEOWNER 填写最新的 PR_REVIEW_CHECKLIST.md，然后再在 Slack 上联系核心维护者进行审阅。为了触发 signoff PR 检查机器人，你必须正确遵循 PR_REVIEW_CHECKLIST.md 模板，包括保留英文语句 As a PR reviewer and CODEOWNER, I have reviewed this and have。

如需进行 PR 验证，请为此 PR 添加 full-sweep-fail-fast 标签（强烈推荐）— 基准测试 sweep 仅在带有标签的 PR 上运行。仅当需要矩阵任务在失败后继续运行时才使用 full-sweep-enabled。

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[github-actions]

see unofficial run visualizer at https://inferencex.semianalysis.com/inference?unofficialRun=29333759620
see unofficial run visualizer at https://inferencex.semianalysis.com/evaluation?unofficialRun=29333759620

[1am9trash]

/reuse-sweep-run

[1am9trash]

As a PR reviewer and CODEOWNER, I have reviewed this and have:

• Verified that as of the moment of typing this, this is the latest version of PR_REVIEW_CHECKLIST.md
• Verified that the general code quality meets the InferenceX standard and does not make the code quality any worse.
• Verified that this PR has passed PR validation. Please link to GitHub Action workflow that shows this. Link: https://github.com/SemiAnalysisAI/InferenceX/actions/runs/29333759620
• Verified that this PR passes evals. Please link to GitHub Action workflow that shows this. Link: https://github.com/SemiAnalysisAI/InferenceX/actions/runs/29333759620
• Verified that speculative decoding PRs uses chat templates to align the AL distribution to real world
• For agentic workloads: verified that speculative-decoding configs (EAGLE / MTP / draft models) run with simulated synthetic acceptance, with the acceptance-length value taken from the committed golden AL curve in golden_al_distribution/ for that model, thinking mode, and draft length. A submission may choose any supported draft length, but it may not substitute a different acceptance target.
• Verified that the model architecture isn't changed with benchmark hacks like using --hf-overrides to skipping indexer for every x layers on models that don't natively support this. As a general rule, we won't accept optimizations that reduces the number of model architecture FLOPs. Anything that makes that same computation run faster is fair game; FLOPs at lower precisions is fine, given that the config passes private evals. As an general north star princple, we should only use optimizations which is used in production by customers that care about accuracy
• If an company claims that they support vLLM/SGLang as first class LLM inference engines on their hardware, I have verified that the respective vLLM submission made using upstream https://hub.docker.com/u/vllm docker repo, upstream SGLang https://hub.docker.com/u/lmsysorg docker repo. The only exceptions are for new hardware, such as MI455X UALoE72, Vera Rubin NVL72, Rubin NVL8, etc., and for new model architectures where there is an actual reason why vLLM/SGLang does not fundamentally support them yet as supported by vLLM/SGLang community maintainers
• If an company claims that they support vLLM/SGLang as first class upstream in-tree LLM inference engines on their hardware, I have have verified that the respective vLLM/SGLang submission has been made before additional frameworks (TRT-LLM, ATOM, etc.). The only exceptions are for new hardware, such as MI455X UALoE72, Vera Rubin NVL72, Rubin NVL8, etc., and for new model architectures where there is an actual reason why vLLM/SGLang does not fundamentally support them yet.
• Verified that every single-node vLLM/SGLang recipe in this PR is documented in the official vLLM recipes and/or the SGLang cookbook:
  • I linked the corresponding upstream PR in the vLLM recipe repo or SGLang repo and verified that it is MERGED before this InferenceX PR merges. An opened, draft, or closed-without-merge upstream PR does not satisfy this requirement. If the matching recipe was already published, I linked the published recipe/cookbook page in the additional detail section below.
• Verified that this PR does not patch the inference engine or serving stack — the pinned image must run as shipped. This covers .patch files / git apply / patch, inline patches embedded in benchmark scripts (e.g. a python3/sed heredoc that rewrites installed engine sources before serving), in-place edits of site-packages, monkey-patching, overwriting container files, and installing forked/rebuilt engine wheels on top of the pinned image. The only exception is a patch covered by a filled-out waiver at docs/waiver/<PR_NUMBER>.md — named after the PR that introduces the patch and filed in that same PR, stating what is patched, why the unmodified upstream image cannot run this benchmark, the upstream PR/issue link, and the removal plan — which I have linked below in the additional detail section.
• If any of the above criteria cannot reasonably be satisfied, I have provided additional reasoning below.

Additional detail section:

• Cookbook PR Link: sgl-project/sglang#31258

Signed: @1am9trash

[Klaud-Cold]

✅✅✅ Verdict: PASS ✅✅✅

✅ Check 0 (CODEOWNER): PASS — @1am9trash is a listed owner of configs/amd-master.yaml; remaining paths carry only the catch-all.
✅ Check 1 (green sweep on in-PR commit): PASS — head commit 87a228c has success (non-skipped) single-node 1k1k/8k1k and eval / check-runs from run 29333759620.
✅ Check 2 (evals pass): PASS — GSM8K em_strict 0.9697–0.9712 across non-MTP and MTP lanes, above the 0.94 qwen3.5 threshold, on the same lmsysorg/sglang-rocm:v0.5.15-rocm720-mi35x-20260713 image this PR pins.
✅ Check 3 (merged recipe): PASS — sgl-project/sglang#31258 is MERGED (2026-07-15) and documents the MXFP4 model on MI355X (TP2/TP4), aiter backend, --page-size 16, allreduce fusion, the EAGLE MTP flags, and both env vars this PR adds (AITER_FLYDSL_FORCE=1, SGLANG_MAMBA_SSM_DTYPE=bfloat16); remaining diffs (--disable-radix-cache, mem-fraction, max-running-requests, watchdog) are InferenceX harness tuning (informational).
✅ Check 4 (reuse command): PASS — /reuse-sweep-run posted by 1am9trash (COLLABORATOR).
✅ Check 5 (latest checklist): PASS — sign-off matches every item of the current docs/PR_REVIEW_CHECKLIST.md template, all checked.
✅ Check 6 (upstream image / engine-first): PASS — upstream lmsysorg/sglang-rocm image on established MI355X; no new non-vLLM/SGLang framework entries.
✅ Check 7 (no architecture hacks): PASS — no --hf-overrides/model-config edits; SGLANG_MAMBA_SSM_DTYPE=bfloat16 is lower-precision state storage documented upstream, with evals passing.
✅ Check 8 (spec-decode chat template): PASS — qwen3.5_fp4_mi355x_mtp.sh benchmarks with --use-chat-template.
✅ Check 9 (no engine patches): PASS — diff contains only env vars, image bumps, and changelog; no patching of the serving stack.
➖ Check 10 (agentic spec-decode golden AL): N/A — no agentic changes (fixed-seq-len configs only), and no synthetic-acceptance knobs on the non-agentic configs.