Skip to content

app: boards: add WeAct STM32F446 Core board configuration#182

Open
digiexchris wants to merge 1 commit intoCANnectivity:mainfrom
digiexchris:add-weact-stm32f446-core-board
Open

app: boards: add WeAct STM32F446 Core board configuration#182
digiexchris wants to merge 1 commit intoCANnectivity:mainfrom
digiexchris:add-weact-stm32f446-core-board

Conversation

@digiexchris
Copy link
Copy Markdown

Add CANnectivity application overlay and Kconfig fragment for the WeAct Studio STM32F446 Core Board (weact_stm32f446_core).

The overlay wires CAN1 (PB8 RX, PB9 TX, intended for an external SN65HVD230 transceiver) to a single CANnectivity channel and exposes TIM2 as the 1 MHz hardware timestamp counter (TIM2 input clock 84 MHz at the new SYSCLK, prescaler 83).

The board's default main PLL configuration produces PLL_Q = 180 MHz, which is incompatible with USB OTG FS (requires exactly 48 MHz). The overlay reconfigures the main PLL (N=336, Q=7) so PLL_Q = 48 MHz while keeping a 168 MHz SYSCLK; this avoids enabling clk48/PLLSAI which would trip an upstream Zephyr build issue on STM32F446
(LL_RCC_PLLSAI_GetMainSource is not provided by the STM32F4 HAL).

@henrikbrixandersen
Copy link
Copy Markdown
Member

Thanks! Looks good. Please add a signed-off-by line to the Git commit log.

Add CANnectivity application overlay and Kconfig fragment for the WeAct
Studio STM32F446 Core Board (weact_stm32f446_core).

The overlay wires CAN1 (PB8 RX, PB9 TX, intended for an external
SN65HVD230 transceiver) to a single CANnectivity channel and exposes
TIM2 as the 1 MHz hardware timestamp counter (TIM2 input clock 84 MHz at
the new SYSCLK, prescaler 83).

The board's default main PLL configuration produces PLL_Q = 180 MHz,
which is incompatible with USB OTG FS (requires exactly 48 MHz). The
overlay reconfigures the main PLL (N=336, Q=7) so PLL_Q = 48 MHz while
keeping a 168 MHz SYSCLK; this avoids enabling clk48/PLLSAI which would
trip an upstream Zephyr build issue on STM32F446
(LL_RCC_PLLSAI_GetMainSource is not provided by the STM32F4 HAL).

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
@digiexchris digiexchris force-pushed the add-weact-stm32f446-core-board branch from 99c7be5 to 2c39c8f Compare April 23, 2026 00:10
@digiexchris
Copy link
Copy Markdown
Author

Thanks! Looks good. Please add a signed-off-by line to the Git commit log.

done! I assumed signed off by you.

@henrikbrixandersen
Copy link
Copy Markdown
Member

Thanks! Looks good. Please add a signed-off-by line to the Git commit log.

done! I assumed signed off by you.

No, it should be signed off by you. Please see https://en.wikipedia.org/wiki/Developer_Certificate_of_Origin

I have an action for documenting the process for contributing to CANnectivity, apologies for not having this in place already.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants