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arm64: dts: apple: M3 SMC, NVMe, MTP, OPP and cpufreq, and J613 board #445
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arm64: dts: apple: M3 SMC, NVMe, MTP, OPP and cpufreq, and J613 board #445
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The board numbers listed in t8122-jxxx.dtsi (J513, J515) were used internally for M3 MacBook Air prototypes and appear in leaks [0], however, no released product seems to exist with them, with the M3 MacBook Air line instead using J613 and J615 [1][2]. Thus, correct these numbers. [0] https://9to5mac.com/2023/04/10/15-inch-macbook-air-panel -production-reportedly-ramping-up-ahead-of-upcoming-launch/ [1] https://en.wikipedia.org/wiki/List_of_Apple_codenames [2] My own personal testing on my 13-inch M3 MacBook Air Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
In the Apple M3 (t8122) device tree: - Add the following properties to each CPU node - operating-points-v2 - capacity-dmips-mhz - performance-domains - Add operating point tables for p-cores and e-cores - Add cpufreq hardware controller nodes (for both p-cluster and e-cluster) Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
Adds the System Management Contorller (SMC) to the Apple M3 SoC (t8122) device tree, including the SMC mailbox and the SMC itself, with GPIO and hwmon children. Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
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Thanks! This works for me, although I pushed an MTP SRAM address tweak to IntegralPilot#2 (which you need to see the RTKit log). |
The internal keyboard and trackpad HID on MacBook variants of the Apple M3 (t8122) SoC are connected through a Apple -developed protocol called DockChannel and mediated by a coprocessor known as the Multi-Touch Processor (MTP). This commit adds the nessecary device tree nodes to the M3's device tree for internal HID to work. It is disabled by default, to be enabled only in MacBook board files where it is tested and confirmed to work. Co-developed-by: Alyssa Milburn <amilburn@zall.org> Signed-off-by: Alyssa Milburn <amilburn@zall.org> Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
On Apple Silicon, NVMe communication is mediated by a coprocessor known as the ANS, and protected by its own IOMMU known as the SART. Add the following nodes to the M3 (t8122) device tree: - Mailbox for the ANS coprocessor - SART (IOMMU for the ANS coprocessor) - The NVMe / ANS coprocessor itself Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
Add a device tree for the Apple MacBook Air (13-inch, M3, 2024) board variant of the M3 (t8122), known as J613. It enables and configures the keyboard backlight and internal HID nodes, as it is a laptop variant which has these devices. Also add this new device tree to the Makefile, so it is built. Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
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Thank you! I fixed the SRAM issue and added you as Co-developed-by for that commit, can see RTKit logs now. |
This only includes the first port, because it's the only port that is present on my hardware, and only includes the pwren gpio for J613. Uses the t6020 base compatible as that is what the M3 hardware appears to be compatible with, rather than the configuration applied by the generic base compatible. Signed-off-by: Alyssa Milburn <amilburn@zall.org> Co-developed-by: Michael Reeves <michael.reeves077@gmail.com> Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
Apple Silicon Macs use two types of IOMMU, SART (for NVMe) and DART (for everything else). On M3 (t8122), the SART is compatible with the t6000 (M1 Pro/Max) one and the DART is compatible with the t8110 (A15) one. Thus, add a t8122 enum variant to the compatibles, but leave the base compatibles unchanged. Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
The mailbox on M3 (t8122) is compatible with asc-mailbox-v4, so add the t8122 compatible variant to enum section of the v4 mailbox section. Signed-off-by: Michael Reeves <michael.reeves077@gmail.com>
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jannau
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Please look at the the upstream t602x device trees for reference on how the compatibles should look. Replace t6020 in those with t8122. It's possible that not all of the driver changes adding the new apple,t8103-* base compatibles are present in the downstream kernel because there are not yet in the base upstream release. In that the device will stop working after the change. We should add those minimal driver changes to this branch.
Please keep the changes to separate dt-binding files in separate commits.
There are dt-binding updates missing. The intention of this branch is that make dtbs_check does not produce warnings for this branch. Since that would exclude mtp/dockchannel I'd propose to keep changes without upstream dt-binding at the end so we can easily test the whether the prior commits pass make dtbs_check.
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this can be removed. I moved the power-domains to t8122-jxxx.dtsi
| * This file contains parts common to all Apple M3 devices using the t8122. | ||
| * | ||
| * target-type: J433, J434, J504, J513, J515 | ||
| * target-type: J433, J434, J504, J613, J615 |
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sigh, these inconsistent identifiers. I'll create a fixup commit for these. I wonder if I got it right in the arm/apple dt-bindings
| enable-method = "spin-table"; | ||
| cpu-release-addr = <0 0>; /* To be filled by loader */ | ||
| operating-points-v2 = <&ecluster_opp>; | ||
| capacity-dmips-mhz = <756>; |
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did you measure this?
| enable-method = "spin-table"; | ||
| cpu-release-addr = <0 0>; /* To be filled by loader */ | ||
| operating-points-v2 = <&pcluster_opp>; | ||
| capacity-dmips-mhz = <1024>; |
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these are ok as 1024 is just the scaled 1
| opp-microwatt = <254000>; | ||
| }; | ||
| opp07 { | ||
| opp-hz = /bits/ 64 <2424000000>; |
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this is either incomplete or wrong. M3 efficiency cores scale up to 2.75 GHz
| mboxes = <&ans_mbox>; | ||
| apple,sart = <&sart>; | ||
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| power-domains = <&ps_ans>, <&ps_apcie_phy_sw>; |
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wrong indentation
| resets = <&ps_ans>; | ||
| }; | ||
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| pcie0_dart_0: iommu@594000000 { |
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wrong indentation
| pinctrl-0 = <&pcie_pins>; | ||
| pinctrl-names = "default"; | ||
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| dma-coherent; |
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please drop this. I'm not actually sure if it is correct
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| description: | ||
| The Apple mailbox consists of two FIFOs used to exchange 64+32 bit | ||
| description: The Apple mailbox consists of two FIFOs used to exchange 64+32 bit |
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unrelated whitespace change
| &port00 { | ||
| bus-range = <1 1>; | ||
| pwren-gpios = <&smc_gpio 13 GPIO_ACTIVE_HIGH>; | ||
| }; |
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I'm missing sub nodes for the wifi and bluetooth functions for the board type and mac adresses
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I pushed my wifi/bluetooth subnodes/aliases to the IntegralPilot#2 branch. |
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