From ed361897edc1fded7e837c7b71bc5cfcdec287e0 Mon Sep 17 00:00:00 2001 From: Suhaas Joshi Date: Tue, 7 Apr 2026 15:54:24 +0530 Subject: [PATCH] feat(crypto): Add crypto perf table for different hardware Add a performance table which contains the output of `openssl speed ...` command over the 3 different hardware options: SA2UL/DTHEv2 accelerator, ARM CE, and base ARM, for AES-128-CBC algorithm. This gives a clear picture of how crypto operations fare over each IP option. Signed-off-by: Suhaas Joshi --- .../AM62LX/linux/_Crypto_Perf_AES_128_CBC.rst | 12 +++++++++++ .../AM62PX/linux/_Crypto_Perf_AES_128_CBC.rst | 11 ++++++++++ .../AM62X/linux/_Crypto_Perf_AES_128_CBC.rst | 11 ++++++++++ .../AM64X/linux/_Crypto_Perf_AES_128_CBC.rst | 11 ++++++++++ .../Kernel/Kernel_Drivers/Crypto/DTHEv2.rst | 10 ++++++++++ .../Kernel_Drivers/Crypto/SA2UL_OMAP.rst | 20 +++++++++++++++++++ 6 files changed, 75 insertions(+) create mode 100644 source/devices/AM62LX/linux/_Crypto_Perf_AES_128_CBC.rst create mode 100644 source/devices/AM62PX/linux/_Crypto_Perf_AES_128_CBC.rst create mode 100644 source/devices/AM62X/linux/_Crypto_Perf_AES_128_CBC.rst create mode 100644 source/devices/AM64X/linux/_Crypto_Perf_AES_128_CBC.rst diff --git a/source/devices/AM62LX/linux/_Crypto_Perf_AES_128_CBC.rst b/source/devices/AM62LX/linux/_Crypto_Perf_AES_128_CBC.rst new file mode 100644 index 000000000..e02aaf4e0 --- /dev/null +++ b/source/devices/AM62LX/linux/_Crypto_Perf_AES_128_CBC.rst @@ -0,0 +1,12 @@ +.. csv-table:: AES-128-CBC Performance + :header: "Size (bytes)", "DTHEv2 Accelerator (MB/s)", "ARM CE (MB/s)", "ARM (MB/s)" + :widths: 30, 30, 30, 30 + + "16", "0.28", "86.86", "28.02" + "64", "1.16", "271.43", "35.57" + "256", "4.63", "568.25", "38.33" + "1024", "17.15", "800.83", "39.08" + "8192", "82.06", "908.72", "39.31" + "16384", "112.48", "917.23", "39.02" + "CPU Usage %", "18", "99", "99" + diff --git a/source/devices/AM62PX/linux/_Crypto_Perf_AES_128_CBC.rst b/source/devices/AM62PX/linux/_Crypto_Perf_AES_128_CBC.rst new file mode 100644 index 000000000..b576cf1ef --- /dev/null +++ b/source/devices/AM62PX/linux/_Crypto_Perf_AES_128_CBC.rst @@ -0,0 +1,11 @@ +.. csv-table:: AES-128-CBC Performance + :header: "Size (bytes)", "SA2UL Accelerator (MB/s)", "ARM CE (MB/s)", "ARM (MB/s)" + :widths: 30, 30, 30, 30 + + "16", "0.43", "97.37", "31.46" + "64", "1.88", "304.29", "39.87" + "256", "7.18", "636.54", "42.97" + "1024", "23.80", "897.51", "43.82" + "8192", "71.31", "1018.75", "44.05" + "16384", "83.60", "1028.48", "43.99" + "CPU Usage %", "34%", "99%", "99%" diff --git a/source/devices/AM62X/linux/_Crypto_Perf_AES_128_CBC.rst b/source/devices/AM62X/linux/_Crypto_Perf_AES_128_CBC.rst new file mode 100644 index 000000000..9e3661487 --- /dev/null +++ b/source/devices/AM62X/linux/_Crypto_Perf_AES_128_CBC.rst @@ -0,0 +1,11 @@ +.. csv-table:: AES-128-CBC Performance + :header: "Size (bytes)", "SA2UL Accelerator (MB/s)", "ARM CE (MB/s)", "ARM (MB/s)" + :widths: 30, 30, 30, 30 + + "16", "0.38", "95.83", "31.06" + "64", "1.60", "300.27", "39.69" + "256", "6.08", "632.25", "42.89" + "1024", "23.90", "895.17", "43.74" + "8192", "93.02", "1018.16", "44.04" + "16384", "117.17", "1028.05", "44.03" + "CPU Usage %", "38%", "99%", "99%" diff --git a/source/devices/AM64X/linux/_Crypto_Perf_AES_128_CBC.rst b/source/devices/AM64X/linux/_Crypto_Perf_AES_128_CBC.rst new file mode 100644 index 000000000..fc201b8af --- /dev/null +++ b/source/devices/AM64X/linux/_Crypto_Perf_AES_128_CBC.rst @@ -0,0 +1,11 @@ +.. csv-table:: AES-128-CBC Performance + :header: "Size (bytes)", "SA2UL Accelerator (MB/s)", "ARM CE (MB/s)", "ARM (MB/s)" + :widths: 30, 30, 30, 30 + + "16", "0.34", "69.43", "22.18" + "64", "1.51", "217.04", "28.34" + "256", "5.99", "454.25", "30.63" + "1024", "21.92", "640.51", "31.25" + "8192", "97.97", "726.61", "31.44" + "16384", "134.93", "727.48", "31.44" + "CPU Usage %", "39%", "99%", "99%" diff --git a/source/linux/Foundational_Components/Kernel/Kernel_Drivers/Crypto/DTHEv2.rst b/source/linux/Foundational_Components/Kernel/Kernel_Drivers/Crypto/DTHEv2.rst index b70ff3f9d..656b2654e 100644 --- a/source/linux/Foundational_Components/Kernel/Kernel_Drivers/Crypto/DTHEv2.rst +++ b/source/linux/Foundational_Components/Kernel/Kernel_Drivers/Crypto/DTHEv2.rst @@ -212,6 +212,16 @@ software only implementation can be compared to the previous test. Page size (bytes): 4096 Exit status: 0 +******************************* +Hardware Performance Comparison +******************************* + +The following table shows AES-128-CBC throughput measured using ``openssl speed`` +across the DTHEv2 hardware accelerator, ARM Cryptographic Extension (CE), and +baseline ARM CPU. + +.. include:: ../../../../../devices/AM62LX/linux/_Crypto_Perf_AES_128_CBC.rst + ****************************************************************** Using the True Random Number Generator (TRNG) Hardware Accelerator ****************************************************************** diff --git a/source/linux/Foundational_Components/Kernel/Kernel_Drivers/Crypto/SA2UL_OMAP.rst b/source/linux/Foundational_Components/Kernel/Kernel_Drivers/Crypto/SA2UL_OMAP.rst index d3cb4eac4..b0a7d0e9f 100644 --- a/source/linux/Foundational_Components/Kernel/Kernel_Drivers/Crypto/SA2UL_OMAP.rst +++ b/source/linux/Foundational_Components/Kernel/Kernel_Drivers/Crypto/SA2UL_OMAP.rst @@ -300,6 +300,26 @@ software only implementation can be compared to the previous test. Page size (bytes): 4096 Exit status: 0 +******************************* +Hardware Performance Comparison +******************************* + +The following table shows AES-128-CBC throughput measured using ``openssl speed`` +across the SA2UL hardware accelerator, ARM Cryptographic Extension (CE), and +baseline ARM CPU. + +.. ifconfig:: CONFIG_part_variant in ('AM62X') + + .. include:: ../../../../../devices/AM62X/linux/_Crypto_Perf_AES_128_CBC.rst + +.. ifconfig:: CONFIG_part_variant in ('AM62PX') + + .. include:: ../../../../../devices/AM62PX/linux/_Crypto_Perf_AES_128_CBC.rst + +.. ifconfig:: CONFIG_part_variant in ('AM64X') + + .. include:: ../../../../../devices/AM64X/linux/_Crypto_Perf_AES_128_CBC.rst + *********************************** Using the TRNG Hardware Accelerator ***********************************