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πŸš€ FPGA Learning Journey: VHDL & Verilog

Welcome to my personal repository dedicated to mastering FPGA development. This space serves as a central hub for the code I write and the best resources I discover while learning VHDL and Verilog.


πŸ—οΈ Development Platforms

My learning is organized by development boards and manufacturers:

πŸ”Ή Xilinx (Artix-7)

  • Focused on the QMTECH Wukong Board (XC7A100T).
  • Working with professional FPGA design flows and hardware constraints.

πŸ”Ή Intel / Altera

  • Projects targeting Cyclone IV, Cyclone V (DE10-Nano), and MAX II CPLDs.
  • Implementing classic designs like "Blink" and peripheral controllers.

πŸ“‚ Repository Contents

  • /Artix100T: Specific projects for the Wukong board.
  • /Cyclone... & /Max II: Designs for Altera hardware.
  • /VHDL: Pure VHDL implementations and logic exercises.
  • /_logic analyzer: Tools and captures for debugging digital signals.
  • useful_links.md: A curated list of external documentation and repositories.

πŸ“– My Learning Goals

  1. Language Mastery: Transitioning fluently between Verilog and VHDL.
  2. Cross-Platform Skills: Understanding the differences between Xilinx and Altera/Intel environments.
  3. Open Source Sharing: Documenting my progress to help other beginners in the FPGA community.

πŸ”— Quick Access

πŸ‘‰ View Useful Links & Resources


✍️ Author

Steve - SteveProjectsLab

β€œLogic is the beginning of wisdom, not the end.”

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