lab6_interrupts.asm

;==============================================================================
; Lab 6 - External Interrupts, Priority, and the Interrupt Vector Table
; Target : ATmega32 on STK500 (JTAGICE mkII)
; Clock  : 1 MHz (internal RC default) -- adjust delayIt if F_CPU differs
;
; Behavior:
;   Main loop free-runs a 1-second up-counter on PORTA (LEDs, active-low).
;   Three external interrupts, all falling-edge triggered, each flash a
;   signature pattern on the LEDs five times before returning to the count:
;       INT0 -> 0x03
;       INT1 -> 0xC0
;       INT2 -> 0xAA
;
;   Hardware priority is fixed by the vector table: INT0 > INT1 > INT2.
;   Because each ISR runs with global interrupts disabled (the I-bit is
;   cleared on entry and only restored by RETI), an ISR cannot itself be
;   pre-empted. A trigger that arrives mid-service only sets the pending
;   flag, and is serviced after RETI according to vector priority.
;
; Notes vs. original report:
;   * The report's discussion said "positive edge triggered"; the actual
;     MCUCR value (0x0A) selects FALLING edge for INT0/INT1. Comment fixed.
;   * ISRs now save BOTH a scratch register AND SREG correctly (the original
;     pushed R3, used R3 to hold SREG, then popped R3 -- which works, but is
;     fragile. Here R16 is the scratch and SREG is preserved cleanly.)
;==============================================================================

.include "m32def.inc"

; 1,000,000 cycles / (10 cycles per Delay1 pass) = 100000 for a 1 s tick @ 1MHz
.equ delayIt = 100000

;------------------------------------------------------------------------------
; Interrupt Vector Table
;------------------------------------------------------------------------------
.org 0x0000
    jmp Start          ; Reset
.org INT0addr
    jmp int_0          ; External Interrupt 0
.org INT1addr
    jmp int_1          ; External Interrupt 1
.org INT2addr
    jmp int_2          ; External Interrupt 2

.org 0x002A            ; first address past the vector table on ATmega32
;------------------------------------------------------------------------------
; Reset / Initialization
;------------------------------------------------------------------------------
Start:
    ldi   r16, low(RAMEND)      ; initialize stack pointer
    out   SPL, r16
    ldi   r16, high(RAMEND)
    out   SPH, r16

    cbi   DDRD, 2               ; INT0 (PD2) as input
    cbi   DDRD, 3               ; INT1 (PD3) as input
    cbi   DDRB, 2               ; INT2 (PB2) as input
    sbi   PORTD, 2             ; enable pull-ups so idle line reads high
    sbi   PORTD, 3
    sbi   PORTB, 2

    ldi   r16, 0x0A            ; ISC11:ISC10=10, ISC01:ISC00=10 -> falling edge
    out   MCUCR, r16
    ldi   r16, 0x00           ; ISC2=0 -> INT2 falling edge
    out   MCUCSR, r16

    ldi   r16, 0xFF           ; PORTA all outputs (LEDs)
    out   DDRA, r16

    ldi   r16, (1<<INT1)|(1<<INT0)|(1<<INT2)  ; local enables: GICR=0xE0
    out   GICR, r16

    sei                        ; global interrupt enable

    clr   r16                  ; counter starts at 0
;------------------------------------------------------------------------------
; Main loop: 1 Hz up-counter on the LEDs (active-low, so complement)
;------------------------------------------------------------------------------
Loop:
    inc   r16
    mov   r2, r16
    com   r2                   ; LEDs are active-low
    out   PORTA, r2
    rcall Delay
    rjmp  Loop

;------------------------------------------------------------------------------
; Delay ~1 second @ 1 MHz. Inner pass is 10 cycles (6 NOP + SUBI/SBCI*2 + BRNE)
;------------------------------------------------------------------------------
Delay:
    push  r17
    push  r18
    push  r19
    ldi   r17, low(delayIt)
    ldi   r18, byte2(delayIt)
    ldi   r19, byte3(delayIt)
Delay1:
    nop
    nop
    nop
    nop
    nop
    nop
    subi  r17, 1
    sbci  r18, 0
    sbci  r19, 0
    brne  Delay1
    pop   r19
    pop   r18
    pop   r17
    ret

;------------------------------------------------------------------------------
; ISR helper: flash the pattern in r21 five times, one second apart.
; Expects the (active-high) pattern in r21 on entry. Clobbers r20,r21 -- both
; r22 are saved/restored by each ISR wrapper below.
;------------------------------------------------------------------------------
FlashFive:
    ldi   r20, 5
FlashLoop:
    mov   r22, r21             ; copy the requested pattern
    com   r22                  ; active-low for the LEDs
    out   PORTA, r22
    rcall Delay
    ldi   r22, 0xFF           ; all LEDs off between flashes
    out   PORTA, r22
    rcall Delay
    dec   r20
    brne  FlashLoop
    ret

;------------------------------------------------------------------------------
; INT0 service routine -> pattern 0x03
;------------------------------------------------------------------------------
int_0:
    push  r16
    in    r16, SREG
    push  r16
    push  r20
    push  r21
    push  r22
    ldi   r21, 0x03
    rcall FlashFive
    pop   r22
    pop   r21
    pop   r20
    pop   r16
    out   SREG, r16
    pop   r16
    reti

;------------------------------------------------------------------------------
; INT1 service routine -> pattern 0xC0
;------------------------------------------------------------------------------
int_1:
    push  r16
    in    r16, SREG
    push  r16
    push  r20
    push  r21
    push  r22
    ldi   r21, 0xC0
    rcall FlashFive
    pop   r22
    pop   r21
    pop   r20
    pop   r16
    out   SREG, r16
    pop   r16
    reti

;------------------------------------------------------------------------------
; INT2 service routine -> pattern 0xAA
;------------------------------------------------------------------------------
int_2:
    push  r16
    in    r16, SREG
    push  r16
    push  r20
    push  r21
    push  r22
    ldi   r21, 0xAA
    rcall FlashFive
    pop   r22
    pop   r21
    pop   r20
    pop   r16
    out   SREG, r16
    pop   r16
    reti