Context
Porting hi3516ev300 from vendor Linux 4.9 to mainline 6.6 LTS (and now 7.0-rc6) revealed that mainline drivers for HiSilicon IP exist but miss BVT-specific hardware initialization.
Kernel branches:
Status: ALL RESOLVED ✅
All drivers ported and verified on real hi3516ev300 hardware with IMX335 sensor.
1. hisi-sfc (SPI NOR flash controller) ✅
Fix: Patched mainline driver in-place (+34 lines):
- Select SPI-NOR flash type in FMC_CFG
- Switch boot→normal mode
- Disable DTR mode in FMC_GLOBAL_CFG
- Remove quad read hwcaps (FMC doesn't set QE bit)
Upstreamable: Yes — small, clean patch to existing driver.
2. mdio-hisi-femac (MDIO bus / Ethernet PHY) ✅
Fix: Wholesale replacement with vendor driver (+345 lines) for internal FEPHY reset/trim/OTP calibration. Required for cold boot — without it, phy_id=0x00000000.
Upstreamable: Not directly. Should be a separate phy-hisi-fephy.c PHY driver for mainline. Carried as out-of-tree patch for now.
3. hisi_femac (Ethernet MAC) ✅
Fix: 1-line compatible string addition.
Upstreamable: Yes — trivial.
4. i2c-hibvt (I2C controller) ✅
Fix: New driver (1144 lines) with Kconfig/Makefile wiring. Added platform_get_irq_optional() for clean probe without IRQ errors.
Upstreamable: Yes — clean new driver, DT bindings documented.
5. Clock drivers ✅
Fix: 4 new CLK_OF_DECLARE drivers + hibvt_reset_init() in reset.c + Kconfig/Makefile wiring for ARCH_HISI_BVT.
Upstreamable: Yes — follows existing HiSilicon clock driver pattern.
6. SPI PL022 ✅
Fix: Moved DTS nodes under AMBA bus (primecell probe), changed PID to 0x00041022 (mainline driver match). Exported spi_controller_class for opensdk compat shim.
Upstreamable: DTS changes yes. spi.c export is out-of-tree only.
7. PWM ✅
Fix: Added DTS node for platform_driver probe on 5.0+.
Upstreamable: Yes — DTS only.
8. Machine descriptor ✅
Fix: 13 SoC machine descriptors with pure DT boot in arch/arm/mach-hibvt/.
Upstreamable: Yes — standard ARM platform support.
9. Boot/earlycon ✅
Fix: CONFIG_CMDLINE_EXTEND with earlycon=pl011,0x12040000 for 6.6.132+/7.0 (PL011 console registers late). DTB chosen/bootargs for U-Boot compat.
Kernel core exports (out-of-tree, NOT for mainline)
| Symbol |
File |
Purpose |
cma_get_base, cma_get_size |
mm/cma.c |
opensdk MMZ allocator |
dma_contiguous_default_area, dma_alloc/release_from_contiguous |
kernel/dma/contiguous.c |
opensdk MMZ allocator |
__stack_chk_guard |
arch/arm/kernel/process.c |
prebuilt vendor .o blobs |
spi_controller_class |
drivers/spi/spi.c |
opensdk sensor_spi compat |
Build/test status
| Component |
QEMU |
Real HW |
Kernel |
| SPI NOR flash |
✅ |
✅ |
6.6, 7.0 |
| Ethernet (cold+warm boot) |
✅ |
✅ |
6.6, 7.0 |
| I2C (3 buses) |
✅ |
✅ |
6.6, 7.0 |
| SPI PL022 (2 buses) |
✅ |
✅ |
6.6, 7.0 |
| PWM |
✅ |
✅ |
6.6, 7.0 |
| CMA memory allocator |
✅ |
✅ |
6.6, 7.0 |
| ISP + video pipeline |
N/A |
✅ |
6.6, 7.0 |
| Boot (U-Boot→kernel→login) |
✅ |
✅ |
6.6, 7.0 |
| Majestic streaming |
N/A |
✅ |
6.6, 7.0 |
Upstreaming
Clean patch series on upstream-patches branch, ready for LKML submission:
- DT bindings — YAML schemas for board, clock, I2C
- Clock/reset — 4 clock drivers + hibvt_reset_init
- I2C driver — hibvt-i2c
- Platform + DTS — mach-hibvt, 6 SoC device trees, femac compat
- hisi-sfc — FMC init + Kconfig fix
- MAINTAINERS entry
All patches compile-tested on 6.6.132, 6.18.21, and 7.0-rc6.
Context
Porting hi3516ev300 from vendor Linux 4.9 to mainline 6.6 LTS (and now 7.0-rc6) revealed that mainline drivers for HiSilicon IP exist but miss BVT-specific hardware initialization.
Kernel branches:
upstream-patches— 7.0-rc6 + 9 BVT patches (current, production)hisilicon-hi3516ev200-6.6— 6.6.132 (archived)Status: ALL RESOLVED ✅
All drivers ported and verified on real hi3516ev300 hardware with IMX335 sensor.
1.
hisi-sfc(SPI NOR flash controller) ✅Fix: Patched mainline driver in-place (+34 lines):
Upstreamable: Yes — small, clean patch to existing driver.
2.
mdio-hisi-femac(MDIO bus / Ethernet PHY) ✅Fix: Wholesale replacement with vendor driver (+345 lines) for internal FEPHY reset/trim/OTP calibration. Required for cold boot — without it,
phy_id=0x00000000.Upstreamable: Not directly. Should be a separate
phy-hisi-fephy.cPHY driver for mainline. Carried as out-of-tree patch for now.3.
hisi_femac(Ethernet MAC) ✅Fix: 1-line compatible string addition.
Upstreamable: Yes — trivial.
4.
i2c-hibvt(I2C controller) ✅Fix: New driver (1144 lines) with Kconfig/Makefile wiring. Added
platform_get_irq_optional()for clean probe without IRQ errors.Upstreamable: Yes — clean new driver, DT bindings documented.
5. Clock drivers ✅
Fix: 4 new CLK_OF_DECLARE drivers +
hibvt_reset_init()in reset.c + Kconfig/Makefile wiring forARCH_HISI_BVT.Upstreamable: Yes — follows existing HiSilicon clock driver pattern.
6. SPI PL022 ✅
Fix: Moved DTS nodes under AMBA bus (primecell probe), changed PID to
0x00041022(mainline driver match). Exportedspi_controller_classfor opensdk compat shim.Upstreamable: DTS changes yes. spi.c export is out-of-tree only.
7. PWM ✅
Fix: Added DTS node for platform_driver probe on 5.0+.
Upstreamable: Yes — DTS only.
8. Machine descriptor ✅
Fix: 13 SoC machine descriptors with pure DT boot in
arch/arm/mach-hibvt/.Upstreamable: Yes — standard ARM platform support.
9. Boot/earlycon ✅
Fix:
CONFIG_CMDLINE_EXTENDwithearlycon=pl011,0x12040000for 6.6.132+/7.0 (PL011 console registers late). DTBchosen/bootargsfor U-Boot compat.Kernel core exports (out-of-tree, NOT for mainline)
cma_get_base,cma_get_sizemm/cma.cdma_contiguous_default_area,dma_alloc/release_from_contiguouskernel/dma/contiguous.c__stack_chk_guardarch/arm/kernel/process.cspi_controller_classdrivers/spi/spi.cBuild/test status
Upstreaming
Clean patch series on
upstream-patchesbranch, ready for LKML submission:All patches compile-tested on 6.6.132, 6.18.21, and 7.0-rc6.